Senior Research Engineer/Research Engineer – Wafer level Packaging
Job Number:
4007681
Date Posted:
07/13/2010
Job Description
Job Responsibilities:
• To design and develop embedded wafer level packaging, with emphasis on wafer level packaging process such as thin film deposition, dielectric layer process, solder bumping.
• To integrate process for embedded wafer level packaging and die embedding
Job Requirements:
• Master’s degree/PhD in Mechanical Engineering or Material Science
• 3 to 5 years Industrial / research experience
• Experience in wafer level packaging, RDL & bumping, Flip-chip assembly
• Knowledge on packaging material selection, package reliability test methods
• Excellent communication skills and teamwork with strong self-motivation
Contact:
Chan Soke Yee
Institute of Microelectronics (IME) 11 Science Park Road Singapore Science Park II Singapore, Singapore 117685 Singapore Phone: 65-67705351 Fax: 65-67731912 Email: personnelime.a-star.edu.sg
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